4.5 Configuration

This section defines the configurable items that must be available to achieve Stage II functionality.
4.5.1 Intel® FSP Related Configuration
PCD
Purpose
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress
FSP-M FV base address
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemorySize
Indicates the PEI memory size reported by the platform
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemorySize
Indicates the PEI recovery memory size reported by the platform
Table 22 Stage II FSP Related Configuration
4.5.2 FV Related Configuration
PCD
Purpose
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase
Post-memory FV base address
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
Post-memory FV size
Table 23 Stage II FV Related Configuration

4.4 Required Functions

4.6 Data Flows

Last modified 2yr ago

`PCD`	`Purpose`
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress	FSP-M FV base address
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemorySize	Indicates the PEI memory size reported by the platform
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemorySize	Indicates the PEI recovery memory size reported by the platform

`PCD`	`Purpose`
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase	Post-memory FV base address
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize	Post-memory FV size