The Stage I functionality is contained in these Firmware Volumes with these attributes.
SEC + StatusCode
Pre-memory board initialization
SEC silicon initialization
Pre-memory silicon initialization
Post-memory silicon initialization
As the foundational stage for further functionality, Stage I may include additional content beyond what is strictly required to meet the stage objective. Typically this will include silicon initialization code that may be packaged in a variety of mechanisms including varying size binary blobs. In the layout shown in Table 5, the Intel® FSP solution is shown as an example. In this case, the FSP binary can be rebased and integrated in one step rather than distributing the work for the FSP-M and FSP-S rebase unnecessarily across later stages. Note that a child FV is a FV embedded within the parent FV. The child FV is identified by a file type of EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE.
Combining the FVs with full set of silicon binary components yields this example flash map for MMIO storage:
Passes PEI core the address of FvFspM
Passes PEI core the debug configuration
Installs firmware volumes
Publishes silicon initialization configuration
Performs pre memory initialization
Additional pre-memory components required for Stage I boot
Advanced pre-memory board support components
Initializes T-RAM silicon functionality
Tests T-RAM functionality
PEI services and dispatcher
Converts UPD to Policy PPI
Pre-memory silicon initialization components
Provide status code infrastructure
Provide status code listeners
Post-memory silicon initialization components
Note that many of the components included above do not actually participate in producing Stage I functionality, and will not be executed when the boot stage target is set to Stage I. For systems that use non-volatile storage technology that does not provide memory map capabilities, this layout may be modified where necessary. However, the firmware execution path must remain scoped to only perform actions required to achieve the boot stage objective.
See Appendix: Full FV Map for a more complete example Firmware Volume layout.